6 IoT semiconductor predictions for 2026

While many in the semiconductor industry are focused on AI chip innovations for the world’s nearly 12,000 data centers, the chips powering the world’s 20+ billion IoT devices are undergoing significant innovations as well. Below, the IoT Analytics team shares 6 predictions for how the IoT semiconductor space is changing in 2026.

Prediction 1: Edge AI integration into IoT chips to accelerate

Edge AI integration into IoT devices will begin a major shift toward AI-capable hardware.

Most IoT devices today lack the built-in compute needed to run AI workloads. Even though demand for local inference has been rising to improve latency, resiliency, bandwidth efficiency, and privacy, the majority of today’s 21 billion deployed IoT endpoints still rely on external processing or simple rule-based logic. This gap between demand and capability sets the stage for a shift in 2026.

NPUs and AI-capable cores entering mainstream IoT designs

Vendors expanding edge AI across IoT tiers. In recent years, only a small subset of IoT products (typically industrial gateways, advanced cameras, and high-end modules) have integrated NPUs or low-power AI accelerators. Vendors are now starting to push these capabilities into broader device categories. New IoT SoCs are being designed with lightweight NPUs, vector extensions, and DSP-like AI cores to support tasks such as anomaly detection, small-model vision, local audio intelligence, and condition monitoring directly on the device.

More complex SoC designs driving demand for AI-ready tooling.

AI features affecting IoT chip design priorities. Embedding NPUs and AI blocks into IoT silicon has increased design complexity, especially around thermal budgets, verification, memory bandwidth, and security. As a result, IoT chip vendors are leaning more heavily on EDA tools optimized for AI compute analysis, reusable IP such as low-power NPUs and secure enclaves, and mature-node foundry processes tuned for mixed workloads (compute + connectivity + security). These needs are emerging across consumer, industrial, automotive, and energy IoT segments.

Edge AI becoming a defining differentiator for IoT OEMs

Device makers linking AI to feature innovation. As AI-capable hardware becomes more accessible, device makers are beginning to treat local inference as a competitive discriminator, enabling features such as privacy-preserving analytics in smart home devices, real-time defect detection in industrial sensors, or offline wake-word detection in consumer electronics.

Prediction 2: The share of chiplet-based and RISC-V-based IoT chips to increase

Modularity and RISC-V gained ground in IoT. Over the past 2 years, rising cost pressures, greater integration demands, and the need for more flexible architectures have influenced the design of IoT semiconductors. These trends have pushed vendors toward modular design approaches such as chiplets and toward open ISAs like RISC-V. As these trends continue, the foundations being laid now suggest a meaningful rise in both chiplet-based and RISC-V-based IoT chips in 2026.

Chiplets

Chiplets replacing monolithic SoCs in new designs. Industry activity in 2024–2025 indicates a clear move away from monolithic SoCs toward partitioned, modular designs. Chiplet architectures separate computing, memory, and I/O functions into smaller dies that can be produced on different process nodes and connected using high-bandwidth interfaces. This has reduced mask costs, improved yields, and enabled targeted upgrades without redesigning entire SoCs. Recent examples include Tenstorrent and BOS Semiconductors introducing Eagle-N, a chiplet-based AI accelerator for automotive systems, and Intel announcing a multi-node, chiplet-based SoC for software-defined vehicles.

RISC-V architecture

RISC-V enabling customized low-power IoT chips. RISC-V has accelerated quickly in IoT as vendors sought flexibility, lower licensing costs, and the ability to customize CPUs for specialized devices. Its open, modular ISA has allowed companies to build differentiated processors without relying on closed IP ecosystems. This has led to fast-growing experimentation and commercial deployments across wearables, microcontrollers, and low-power edge devices.

Prediction 3: More IoT chips to be designed with carbon awareness in mind

RISC-V adoption surging across IoT segments. Sustainability requirements are becoming more concrete for semiconductor vendors as regulations such as the EU’s Corporate Sustainability Reporting Directive (CSRD) and rising customer expectations make carbon transparency unavoidable. Carbon tracking is increasingly treated as a core design constraint in IoT, now discussed alongside power, performance, area, and cost (PPAC) rather than as a separate reporting exercise.

Design workflows integrating carbon metrics

Carbon metrics part of semiconductor design workflows. Several developments over 2024–2025 indicate that carbon data is starting to enter day-to-day engineering workflows. Some EDA vendors are already feeding emissions data into early architectural trade-offs. For example, in May 2025, US-based EDA, hardware, and IP provider Cadence joined Belgian-based nanoelectronics R&D hub imec’s Sustainable Semiconductor Technologies and Systems (SSTS) program to integrate process and supply-chain emissions data directly into design environments, enabling engineers to compare carbon impacts the same way they compare power, performance, and area (PPA) metrics. IP providers are also expanding their deliverables to include sustainability metadata and lifecycle assumptions so that integrators can pass carbon estimates through system-level simulations and procurement stages.

Foundries and chip vendors standardizing disclosures

IoT chipmakers improving carbon reporting standards. Foundries and chip suppliers in general have been increasing the granularity of their sustainability reporting, making it easier for OEMs to incorporate carbon impact into component selection. With IoT Analytics forecasting 39 billion connected IoT devices by the end of 2030, accurately capturing sustainability reporting details has become particularly important for the entire IoT ecosystem, and IoT semiconductor firms are already taking action.

In June 2024, Germany-based semiconductor design and manufacturing company Infineon expanded Product Carbon Footprint disclosures across MCUs and connectivity parts, covering materials, manufacturing, and logistics so OEMs can benchmark embodied carbon during evaluation, not just energy efficiency in operation. In April 2025, Taiwan-based contract chip manufacturer TSMC committed to the Science Based Targets initiative (or SBTi) and now provides node-level footprint data, while also pushing renewable sourcing across its supplier base.

The IoT semiconductor value chain

Semiconductor design and manufacturing consists of 6 main stages from conception and research to module assembly, as shown above. IoT Analytics groups these stages into 10 stakeholder types. IoT chips follow the same value chain steps as other semiconductor chips. The IoT Semiconductor Design and Manufacturing Ecosystem Market Report 2025–2030 focuses on the 3 points where an IoT chip is actually specified and produced: EDA for IoT, SIP for IoT, and foundries for IoT.

EDA for IoT. Companies that provide software tools to design silicon and modules for IoT endpoints and gateways. This includes register-transfer level (RTL), simulation, verification, synthesis, designs for testing (DFTs), packaging, and printed circuit board (PCB) tools that are used for IoT-focused microcontroller units MCUs, connectivity integrated circuits (ICs), sensors, and systems-on-chips (SoCs).

SIP for IoT. Companies that license reusable intellectual property (IP) blocks for IoT chips; for example, CPU and MCU cores, NPUs, security elements, and interconnect IP. Revenue in scope is generated only from IP used in IoT endpoint or gateway SKUs.

Foundry for IoT. Companies fabricating wafers and advanced packaging for chips designed for IoT endpoints and gateways. This includes mature and advanced nodes, embedded non-volatile memory, RF and analog processes, and system-in-package (SiP) or 3D IC packages for IoT modules.

Prediction 4: More IoT devices to be produced locally

Countries investing in local semiconductor manufacturing across the IoT value chain. Governments have intensified efforts to localize production of semiconductors in general as part of broader strategies to secure technology supply chains and reduce geopolitical risk. Export controls, sovereignty initiatives, and national subsidy programs have made localization a priority not only for advanced computing but increasingly for the lower-power, high-volume chips used in IoT devices. These point toward a 2026 environment in which a greater share of IoT chips will be fabricated, packaged, and assembled within regional ecosystems rather than concentrated in a single geography.

Policy pressure expanding into IoT components

Governments tighten control on semiconductor supplies, including IoT chips. National semiconductor policies initially focused on leading-edge logic, but recent actions indicate that governments are extending oversight into microcontrollers, connectivity chipsets, secure elements, and sensor-level silicon, key building blocks of IoT devices. The US, EU, China, and Japan have each updated their export-control lists and industrial policy frameworks to include categories relevant to IoT (e.g., RF front-end components, power management ICs [PMICs], and low-power MCUs). These moves signal that IoT silicon is no longer viewed as purely commoditized but as critical to national digital infrastructure.

Investments creating regional capacity for IoT-focused production

Countries investing in domestic IoT chip production. The last several years have seen large-scale industrial programs funding domestic manufacturing capacity. Notable examples include the following:

US – The CHIPS and Science Act allocated $52.7 billion to boost domestic manufacturing and R&D. Further, the government has expanded funding to semiconductor production companies like Intel, TSMC, and Samsung.

China – China hascountered the US’s actions with a $47.5 billion “Big Fund” to boost domestic chipmaking and close its technology gap by 2030.

Japan – The government of Japan has committed approximately $65 billion by 2030 to expand its semiconductor and AI sectors, supporting domestic fabs and R&D partnerships.

South Korea – Republic of Korea officials announced a $19 billion support package in 2024 to strengthen its chip supply chain and SME competitiveness.

EU – The EU is channeling investments under the EU Chips Act to localize production, secure raw materials, and establish technological sovereignty across member states. Leading national efforts include Italy’s €10 billion investment to become one of the largest microelectronics producers in Europe and the Netherlands’ €2.5 billion Brainport Eindhoven initiative, which aims to enhance collaboration between businesses, academia, and governments for technological development, including semiconductors.

Prediction 5: IoT chip design to become heavily AI-supported

AI becoming core part of IoT chip design workflows. EDA vendors have spent the past 2 years integrating AI into front-end and back-end design flows, giving semiconductor teams new ways to automate labor-intensive tasks, validate constraints, and identify issues earlier. These capabilities are especially relevant to IoT chips, where tight power, area, and cost envelopes leave little room for design iteration.

AI entering mainstream EDA workflows

AI expanding into full semiconductor design flows. Several developments across 2024–2025 show that AI is starting to assist with full design-flow activities rather than isolated point tools. In July 2025, Siemens Digital Industries Software, a US-based business unit of Germany-based industrial automation company Siemens, unveiled an AI-enhanced toolset covering schematic capture through physical implementation, including features for verification automation, constraint analysis, and early flaw detection. These tools are being positioned to support both semiconductor and PCB design, which is directly relevant to IoT vendors integrating RF, sensors, and compute into constrained form factors.

Agentic AI moving toward workflow automation

EDA firms mapping path to autonomous design agents. Vendors are also outlining roadmaps for AI systems that do more than generate code or propose optimizations. In March 2025, US-based EDA software company Synopsys’ CEO Sassine Ghazi, for example, outlined a roadmap (shown below) in which today’s generative AI design tools will advance to fully autonomous, multi-agent design systems. These “agent engineers” are expected to support areas such as IP integration, advanced packaging, process-node selection, and lifecycle management, domains that directly affect IoT silicon, which increasingly mixes digital logic, RF, power management, and sensing functions in a single package.

Prediction 6: IoT security-by-design to become non-negotiable

IoT security-by-design becoming requirement across global markets. Security-by-design has shifted from a best practice to a regulatory expectation, and this shift is especially consequential for IoT. IoT devices operate in widely distributed, resource-constrained environments (e.g., factories, homes, vehicles, and energy systems) where they cannot rely on traditional perimeter security. Their long lifecycles, remote deployment, and constant connectivity make hardware-level protection essential for safety, reliability, and compliance. These realities are pushing vendors to integrate stronger silicon-level security into the IoT value chain.

Hardware security becoming mandatory for market access

Compliance mandates evolving IoT security architectures. Regulatory frameworks such as the EU Cyber Resilience Act, the US National Institute of Standards and Technology’s (NIST) post-quantum roadmap, and UNECE R.155 and R.156 increasingly require verifiable hardware protections before devices can be sold. For IoT suppliers, this means that features such as hardware root of trust, secure boot, and physical unclonable function (PUF)-based identity are no longer optional; they are now prerequisites for certification in sectors such as industrial automation, automotive, healthcare, and smart home.

Compliance ecosystems expanding to support IoT deployments

Vendors building tools for long-term IoT compliance. As requirements tighten, vendors are redesigning chip architectures and investing in compliance tooling that helps IoT device manufacturers meet lifecycle obligations. Companies such as UK-based IoT cybersecurity company Crypto Quantique are automating secure provisioning, certificate lifecycle management, and vulnerability tracking, capabilities IoT OEMs rely on because devices may be deployed for 10–20 years without physical access. Meanwhile, US-based semiconductor design and manufacturing company Qualcomm and others are standardizing secure boot flows, producing signed software bills of materials, and integrating monitoring mechanisms to help vendors maintain long-term compliance across deployed fleets.

George Grey, VP software at Qualcomm:

“Security is not a bolt-on module; it needs to be considered through the entire life-cycle of a product from initial hardware and software design to end of life.”

Post-quantum readiness becoming a design constraint for long-lifecycle IoT

Post-quantum cryptography moving into IoT hardware. Quantum computing has elevated the urgency around post-quantum cryptography, particularly for IoT devices that will operate for decades and cannot easily be replaced. NIST’s guidance on migrating to post-quantum cryptography (PQC) by 2035 has led semiconductor vendors to embed quantum-safe algorithms (such as the Module-Lattice-Based Key-Encapsulation Mechanism (ML-KEM) into hardware. Infineon’s EAL6-certified PQC hardware (TEGRION security controllers) illustrates how quickly these features are moving from roadmap concepts to commercial products.

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